Pseudo Division and Pseudo Multiplication Processes

Some digit-by-digit methods for the evaluation of the elementary functions are described. The methods involve processes that resemble repeated-addition multiplication and repeatedsubtraction division. Consequently, the methods are easy to implement and the resultant execution times are short. Introduction It is customary in computers to build an arithmetic unit which is capable of adding, subtracting, multiplying and possibly dividing. To perform more complicated operations it is usual to write routines that use these basic operations, operating on words at a time. However, in certain cases, digit-by-digit methods exist for the evaluation of certain functions. Some of these are altractive because they can be made faster than the corresponding subroutine methods, and also because they do not need so much storage space; sophisticated fast subroutines for evaluating the elementary functions require the storage of many constants. Hence, it is worthwhile considering whether more powerful arithmetic units could be provided which would be capable of performing these digit-by-digit methods. The advent of microprogramming as a method of computer control has made it very easy to construct relatively complicated arithmetic units. The methods described here are ideal for a machine with such control. However, these methods can also easily be implemented in a conventional manner. The first part of this paper will show flow diagrams of four routines. These will form, respectively, ylx, log[ 1 + (ylx)], tan’(ylx), and d* for given y and x. A striking feature of these four routines is their similarity. This means that a common microprogram subroutine or common hardware may be used, in one of four different modes of operation, and this, of course, represents an economy in the number of microinstructions or in the amount of hardware required. These ideas are particularly helpful to the designer of small but powerful machines, but they may also have applications for larger machines, where it is required to have the elementary functions “built in.” The second part of this paper shows how essentially, by reversing the above routines, tan y, xey and xy2 may be generated. 21 0 In the paper it will, be supposed that base 10 arithmetic is being used. This is by no means a restriction. However, the fact that operations can be performed with base 10 is an advantage in the area of small machines where it may be inconvenient to provide decimal-to-binary conversion. Section 1: Division The basic repeated subtraction process is, of course, very well known indeed. For completeness the flow diagram for it is shown in Fig. 1. Initially register A contains an n digit word y , and register B an n digit word x. x is subtracted from y as many times as is possible until A becomes as small as it can without going negative. The number of subtractions is recorded in a counter whose contents are transferred to a shifting register Q . One too many subtractions is performed and this requires a subsequent addition. It is possible of course to omit this addition and alternately subtract and add, and this possibility remains in the cases of the routines to be described. However, for the sake of simplicity, this complication will be omitted. (A) are now multiplied by 10 and the process is repeated. When it has been repeated n times as shown by the counter j , the ( Q ) are the n digits of the quotient ylx. To keep the digits of the answer less than 10, there is a restriction y/x < 10. A must be a register of length n + 1 to allow for the shift left. The answer is, of course, exact, except for the remainder. Modijied division The modification to this basic routine which is proposed here is to provide a modifier register M. This is loaded uring each subtraction cycle immediately prior to subtraction. After each subtraction the pseudo divisor which is in B is updated. This is done by adding to the divisor, the contents of the modifier M shifted j places to the right, where t h e j + lth quotient IBM JOURNAL APRIL 1962